While AI is transforming nearly every industry, one of its most significant impacts is happening behind the scenes, inside the semiconductor factories responsible for building the chips that power today’s AI revolution. During a recent presentation at the Global Semiconductor Alliance (GSA) European Executive Forum, I discussed how the conversation around AI scale is evolving. For years, the semiconductor industry focused primarily on transistor scaling. Today, however, the biggest challenges facing AI designers extend far beyond the transistor. Power delivery, connectivity, advanced packaging, and supply chain resilience are emerging as the primary constraints on AI scaling. At Intel Foundry, we’re addressing these challenges on two fronts. First, we’re developing advanced process and packaging technologies that help customers build increasingly capable AI systems. Second, we’re using AI and machine learning (ML) throughout our technology development and manufacturing operations to improve quality, accelerate yield learning, and help customers bring products to market faster. Three forces shaping the future of semiconductor design Three major AI trends are shaping what modern silicon must deliver: Agentic AI introduces multistep reasoning workloads that are far less predictable than traditional computing. Autonomous agents place new demands on power delivery and high-performance connectivity, making efficient scaling increasingly important. Physical AI brings intelligence to edge devices and real-world systems. Scalable AI-enabled automation and modeling are essential for cost-effective, high-yield manufacturing. The foundry industry increasingly views both agentic AI and physical AI as significant long-term growth drivers. Sovereign AI initiatives are increasing demand for secure, resilient, and geographically diverse manufacturing and supply chains to support both business continuity and national security needs. By maintaining Intel Foundry’s production capabilities across North America, Europe, and Asia, customers gain flexibility in determining where their products are manufactured while improving supply chain resilience and security. Multi-dimensional scaling: The new path forward A decade ago, the semiconductor industry largely focused on the system-on-chip (SoC) model, where a single chip integrated as much functionality as possible. Today, innovation has shifted toward a system of chips, using chiplet architectures that combine multiple specialized dies, memory stacks, and accelerators into a single solution. This approach provides greater modularity, scalability, and faster innovation cycles while enabling the performance required for advanced AI workloads. At the same time, scaling is no longer simply a matter of shrinking transistors. The industry is increasingly focused on optimizing performance across the entire system, from compute and memory to packaging and interconnects. Advanced process technologies such as gate-all-around (GAA) transistors, including Intel 18A with RibbonFET GAA technology, provide improved electrostatic control and support scaling beyond traditional FinFET architectures. Power delivery also has been reimagined. Intel 18A uses PowerVia, our backside power delivery technology that routes power through the back of the wafer rather than sharing frontside interconnect layers with signal routing. By separating power and signal paths, PowerVia reduces resistance, voltage drop, and power delivery noise. Combined with high-density metal-insulator-metal (MIM) capacitors, the architecture improves power integrity. PowerVia delivers up to a 10% increase in cell utilization¹ and a 4% improvement in ISO-power performance.² Connection to the transistor layer is enabled through innovative nano through-silicon vias (TSVs) that are approximately 500 times smaller than conventional TSVs. While backside power adds manufacturing complexity, Intel Foundry optimized the overall cost structure by maintaining 32 n