Altera Corp. has announced its Agilex 2X FPGA portfolio, covering high-performance, mid-range and power- and cost-optimized devices for applications ranging from AI infrastructure to intelligent edge systems. The lineup comprises four families, with Agilex 27 the first to launch. The portfolio targets both Digital AI infrastructure and Physical AI applications, including aerospace and defense, networking, robotics and industrial automation. Altera said the devices combine programmable logic with enhanced AI tensor digital signal processing (DSP) blocks, Arm-based processing and high-bandwidth connectivity. “Digital AI and Physical AI are expanding the opportunity for programmable logic uses, as developers build systems that must adapt to rapidly evolving workloads, technologies, and standards,” said Raghib Hussain, president and CEO of Altera. “Agilex 2X is designed to give customers one platform that delivers the performance and density the most complex Digital AI and aerospace and defense systems demand, and scales down to the low power and small footprint the intelligent edge requires. With QuartusIQ support, that scalable foundation protects their engineering investments and aims to get new designs to market faster.” The four families address different performance and power requirements: Agilex 27 targets bandwidth-intensive applications, including datapath processing, beamforming and RF processing. Agilex 25 combines FPGA fabric and embedded compute with optimized I/O, transceivers and peripherals for 4K/8K video processing, drones and low-latency sensors. Agilex 23 integrates embedded compute, real-time processing and functional safety for robotics, industrial automation and automotive systems. Agilex 22 targets I/O-intensive applications such as board and rack control, motor control, root-of-trust functions and interface bridging. All four families use the Quartus Prime software environment, with QuartusIQ providing an AI-based design companion. The common development environment supports reusable IP across the portfolio. Devices also share Arm-based hard processors, Nios V soft processors, post-quantum-cryptography-ready secure boot and functional-safety practices. The first family, Agilex 27, is aimed at Digital AI infrastructure, terabit networking, 6G and satellite communications, and aerospace and defense systems. Based on the third-generation HyperFlex fabric, the devices are specified to deliver up to 1.8 times the performance per watt of the previous-generation Agilex 7. HyperFlex distributes registers throughout the routing fabric, allowing Quartus Prime to retime and pipeline designs without using additional logic resources. Updated adaptive logic module (ALM) modes are also intended to improve logic utilization and performance. Agilex 27 introduces a distributed HyperFlow data network for multi-terabit-per-second data movement across the FPGA. Altera said the network operates without consuming programmable logic resources or adding routing congestion. Connectivity options include configurable transceivers operating at up to 256Gbps and hardened IP for 800GbE and 1.6TbE Ethernet, PCIe 6.0 and 7.0, DDR5, LPDDR5X and LPDDR6 memory interfaces. Support also includes MIPI C-PHY 2.1, D-PHY 3.0 and UCIe for chiplet integration. Security features are handled by Altera’s Secure Device Manager, which provides secure boot, device identity, attestation, protected key management and physical anti-tamper protection. Its crypto-agility capabilities support post-quantum cryptography. The devices also support line-rate encryption across major interfaces, including Ethernet MACsec, PCIe Integrity and Data Encryption (IDE), and Inline Memory Encryption (IME). The post Altera Expands FPGA Lineup with Agilex 2X Portfolio for AI and Embedded Systems appeared first on EE Times Asia .