AI accelerators are drawing enormous currents (about 2,000 A today, with roadmaps to 5,000 A), and every bit of efficiency counts. “If they can be more efficient in how many compute cycles they run per watt, that gives them a competitive advantage,” said Shaun Bowers, SVP of product management at Saras Micro Devices . “Saras is in the middle of all of those efficiency gains, figuratively and literally.” The “literally” is because Saras embeds capacitors directly into the printed circuit board or package substrate of an AI or HPC accelerator, enabling the vertical power delivery the industry is chasing. Filling the gap As packages grow, there is no room left on the top side for voltage regulation, so it is moving underneath, directly below the processor, which also shortens the path and cuts I²R losses. But a voltage regulator can only react so fast to a processor’s rapid swings in demand, so capacitors fill the gap. Bowers, who lives in Phoenix, compared it to his air conditioner. “When my air conditioner turns on, the lights in my house dim a little bit. That’s the droop,” he said. “If I put a big enough capacitor there, there would be no droop.” Without that support, a CPU or GPU can miss clock cycles. With the space under the processor taken by the regulator, the only place left for capacitors is inside the board or package. Today that is done with MLCCs or deep trench capacitors, which Bowers said were not designed for embedding easily. Saras’s STILE capacitor is made the same thickness as the core material used in substrates and PCBs, and it can be matched to any core thickness as cores get thicker for rigidity. That leaves the top side free for high-speed signaling while power is delivered from below. Further out, Saras plans to pre-embed capacitors into tested arrays, a “known good array” along the lines of the known good die concept, so manufacturers embed a few arrays instead of hundreds of discrete parts. From development to design-in Eelco Bergman, chief strategy officer, said the company has come a long way in the past year. Saras has qualified its capacitor manufacturing process and demonstrated reliability, and customers are doing full characterization rather than just evaluating engineering samples. Embedding has been demonstrated with customers’ substrate suppliers. “We’re really on a path now towards actual product intercept,” he said. Customer feedback asked for a smaller part to leave room for vias, and in the last 90 days or so Saras began sampling a 2 mm x 2 mm capacitor, one quarter the size of its first 4 mm x 4 mm product, using the same core technology ( FIGURE 1 ). “It was really just a matter of size reduction, but everything else has held up,” Bergman said. That part is now moving into reliability testing. Figure 1. Saras’s new 2 mm x 2 mm capacitor: a fabricated device in cross-section (left) and the device model (right). (Source: Saras Micro Devices) Saras is still pre-revenue, but Bergman said it has line of sight to design wins. Manufacturing is in Chandler, Ariz., with R&D in Atlanta. For high-volume, multi-sourced supply, the plan is not licensing, at least initially, but partnering with an established manufacturer. The decision-makers, he said, are the AI accelerator designers who control power delivery from the rack to the chip. They specify the part, and the PCB and package makers build it in. Editor’s note: In the interest of efficiency and timeliness, this article was drafted with the help of AI (Claude, from Anthropic), working from a recording of an interview arranged by Bodewell Group and the company’s press materials. It was reviewed and edited by Semiconductor Digest. The post Saras Micro Devices Embeds Capacitors to Power AI Accelerators appeared first on Semiconductor Digest .