United Microelectronics Corp. (UMC) and AP Memory are collaborating on silicon capacitor technologies for power delivery in artificial intelligence (AI) and high-performance computing (HPC) systems, targeting the growing demands of next-generation data centers. The partnership combines UMC’s deep trench capacitor (DTC) foundry technology and wafer manufacturing capabilities with AP Memory’s silicon capacitor designs and system-level integration. The companies are targeting architectures that place capacitors closer to computing dies, moving power stabilization functions from circuit boards into package substrates or interposers. This approach shortens the power delivery path and is intended to improve power integrity and voltage regulation in advanced packages. In the third quarter of 2026, AP Memory’s S-SiCap Gen2D discrete silicon capacitor designs completed tape-out and initial functional validation, the companies said. The next phase will involve system-level performance and reliability testing of capacitors integrated into substrate packages, covering different capacitance and operating voltage requirements. UMC and AP Memory are also evaluating extensions of the collaboration to capacitor-embedded interposers and landside capacitors for other system architectures. “The growth of AI and HPC is driving a fundamental shift in power delivery – from board-level towards increasingly vertical power integration on the chip-level. UMC is offering robust power delivery solutions, including our DTC technology, which enables high-density capacitance to be placed closer to the computing die for more stable power delivery. By partnering with AP Memory, we are helping to bring scalable solutions to the market to solve the critical power bottleneck challenges as AI infrastructure continues to evolve,” G.C. Hung, senior vice president of UMC, said in a press statement. “The successful tape-out and initial wafer validation of our customized S-SiCap products using DTC technology represents an important milestone in demonstrating the flexibility and manufacturability of AP Memory’s S-SiCap design. By working with UMC, we are providing our customers a total solution, from product design to wafer manufacturing,” said Ivan Hong, president of AP Memory. UMC’s power delivery roadmap includes discrete and embedded silicon capacitors, as well as active components such as internal voltage regulators. The company is also applying its advanced packaging capabilities to integrate power components at higher densities and meet the voltage and capacitance requirements of future data centers. UMC said it is investing in additional manufacturing capacity to support power delivery and heterogeneous integration solutions. The post UMC, AP Memory Advance Silicon Capacitors for AI Power Delivery appeared first on EE Times Asia .
UMC, AP Memory Advance Silicon Capacitors for AI Power Delivery
The collaboration combines deep trench capacitor technology and silicon capacitor designs for advanced packaging in AI and HPC systems. The post UMC, AP Memory Advance Silicon Capacitors for AI Power Delivery appeared first on EE Times Asia .
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