Synaptics Inc. has claimed a new class of microcontrollers (MCUs), the xMCU, for multimodal edge AI. Announced at its annual tech day, the new Astra SR200 series combines heterogeneous, AI-native compute and acceleration with integrated high-bandwidth custom DRAM. It was designed to enable device-native and real-time experiences that combine modalities such as voice, vision, audio, motion, and contextual sensing. Built on a tiered architecture, it combines up to 8 MB of SRAM with extensible, high-bandwidth, high-capacity custom DRAM that scales to hundreds of megabytes to meet AI model and workload requirements. The architecture runs workloads at one-third the power of typical system DRAM, according to Synaptics, which eliminates the need for external memory in most applications at a fraction of the system power. This scalability enables larger AI models and multimodal workloads to run entirely on-device, Synaptics said, targeting AI wearables, battery-powered sensing devices, connected cameras, streamers, and industrial vision and voice systems. The Astra SR 200 series is built around several core vectors that deliver greater design flexibility, according to the company. These include high-performance compute with extensible memory, transformer-ready AI acceleration, silicon-rooted security, multimodal integration, ultra-low-power architecture with tiered domains, and an open-source software ecosystem, For additional scalability, the new xMCU series is available in three versions that are pin-compatible and share a common hardware foundation and software development kit (SDK). The SR210 delivers 200 GOPS for power-optimized, always-on voice and sensing; the SR230 includes vision, display, and optional audio at 300 GOPS for mainstream multimodal devices; and the SR250 offers 400 GOPS with dual vision and display paths for premium edge applications. Astra SR200 xMCU (Source: Synaptics Inc.) The SR200 Series is powered by the Synaptics Torq AI engine, a standards-based hardware architecture and unified developer experience that integrates the Coral NPU from Google Research. It is optimized for low latency and high-efficiency execution of deep learning workloads, including CNN, transformer, and fully connected networks, Synaptics said, and the open-source MLIR/IREE compiler supports industry-standard frameworks and model formats. The series claims the industry's first pairing of the Arm Cortex-M85 and Cortex-M52. The high-performance core, scaling to 800 MHz, handles control, multimedia, and burst-compute workloads, while the efficiency core delivers always-on sensor fusion, connectivity, and low-power inference. Synaptics also adds an optional Cadence Tensilica HiFi 5 DSP for dedicated audio and acoustic ML processing, while an always-on domain manages voice activity detection, timekeeping, and wake-up. The SR200 also is packed with security features built on a multi-layered security engine that combines hardware isolation, cryptographic acceleration, anti-tamper detection, device lifecycle management, and secure boot. It meets PSA Level 3 and CC EAL4+ certification targets, providing protection against software and physical attacks. For greater flexibility, the platform also provides a wide range of peripherals and connectivity, including high-speed octal SPI, SDIO, and eMMC storage interfaces, as well as UART, SPI, I2C, I3C, PWM, USB 2.0, and low-power GPIOs. Industrial variants offer 1Gb Ethernet with IEEE 1588 TSN support and two CAN-FD interfaces, supporting deterministic networking and real-time industrial control for physical AI and robotics applications. Along with the open-source Torq NPU compiler, the platform supports Zephyr RTOS. Coralboard SR development board Synaptics also introduced the Coralboard SR development board, based on the new SR200 Series. The Coralboard family, developed in collaboration with Google Research, offers an edge AI developer experience across the SL and SR versions thanks to the MLIR-based